MicroLED Optical Interconnect Next-Generation I/O Architecture for AI Infrastructure

Array-parallel architecture breaks through the physical limits of electrical interconnects, replacing copper with light to power next-generation AI compute infrastructure.

Explore Technology Contact Team
Data Center Optical Interconnect Rendering — MicroLED Array Fiber Bundle
1Tbps to 100Tbps
Ultra-High Aggregate Bandwidth
<1 pJ/bit
Ultra-Low Transmission Energy
<1 ns
End-to-End Latency
  • Full-Stack Validated
  • CMOS Compatible
  • AI-Cluster Ready

Array-Parallel Optical Interconnect Architecture

Shifting from single-channel rate limits to 2D channel count scaling, replacing copper with light to break physical interconnect bottlenecks

Optical over Copper

Breaking through copper cable limits, achieving Tbps-class aggregate bandwidth

Array-Parallel

1,000+ channel linear scaling, 1–10 Gbps per channel

CMOS Compatible

16nm–130nm mature process, supply chain validated

  1. 01

    MicroLED Array

    32×32 – 100×100

  2. 02

    Microlens Coupling

    Micron-Level Alignment

  3. 03

    Multicore Fiber Bundle

    1,000–10,000 Cores

  4. 04

    PD Array Receiver

    Si-Based PIN

100× Bandwidth Increase
10× Energy Reduction

Order-of-Magnitude Performance Leap

Fundamental breakthroughs enabled by array-parallel architecture

Technical Comparison

Metric Array Photonics Legacy Copper
Aggregate Bandwidth 10–100 Tbps <1 Tbps
Energy per Bit <1 pJ/bit ~10 pJ/bit
End-to-End Latency <1 ns Hundreds of ns (with DSP)
Bandwidth Density 1 Tbps/mm² Limited

Multi-Dimensional Advantages

* Data based on lab prototype validation

Full-Stack Coverage for AI Compute Infrastructure

End-to-end optical interconnect solutions from intra-node to cluster backbone

GPU Optical Interconnect Anatomy

Intra-Node GPU Interconnect

Replacing copper with Tbps-class bandwidth and sub-ns latency, breaking through electrical interconnect bandwidth ceilings

Optical vs Copper Comparison

Board / Rack Interconnect

Fiber bundles replace copper cables — 10× lower power, 70% less cabling volume, dramatically simplifying data center thermal and cabling complexity

AI Cluster Optical Interconnect Architecture

Supercomputing / AI Cluster Backbone

All-optical network architecture supporting efficient 10,000+ GPU cluster interconnection, eliminating electrical bottlenecks

Full-Stack Technology Core

Covering transmit, coupling, transmission, and receive — with clear performance targets for each module

Transmitter

Proprietary IP
  • 32×32 to 100×100 Arrays
  • 1–10 Gbps per Channel
  • Tbps-Class Scalability

Coupling

Proprietary IP
  • Microlens Array Coupling
  • Micron-Level Alignment
  • Low Insertion Loss

Transmission

Proprietary IP
  • 1,000–10,000 Core Fiber Bundle
  • Core Diameter <10μm
  • Low Crosstalk

Receiver

Proprietary IP
  • Si-Based PIN PD Array
  • Responsivity >0.4 A/W
  • Pixel Redundancy, <10 FIT

System-Level Design Target

  • E2E Latency <1 ns
  • Drive Energy 0.1 pJ/bit
  • DSP-Free

Collaborating with leading OSAT partners to advance validation